1. Technical Field
This invention relates to the fabrication of devices and, in particular, the fabrication of devices that include a silicon oxide region.
2. Art Background
In the fabrication of devices such as semiconductor devices, a variety of material layers is sequentially formed and processed on a substrate. (For the purpose of this disclosure, the substrate includes a bulk material such as (1) a pyroelectric, e.g., LiNbO.sub.3, or (2) a semiconductor, e.g., silicon, body, and if present, various regions of materials such as dielectric materials, metallic materials, and/or semicondutor materials.) Often, one of the material regions utilized in this fabrication procedure includes a silicon oxide, i.e., a material nominally represented by the formula SiO.sub.n where O&lt;n.ltoreq.2. For example, silicon oxide regions are utilized as passivating layers as electrical insulation between conducting layers, e.g., metal layers, and as a cap for doped semiconductor layers to limit unacceptable dopant migration during subsequent processing.
A silicon oxide is often deposited on a non-planar substrate surface having a plurality of steps, e.g., metal steps, (6 in FIG. 1). It is desirable that the deposited silicon conformally coat this non-planar surface. If a conformal silicon oxide layer is not achieved, an irregular coating, 18, forms over the underlying steps, 12. If deposition is continued, voids, 10, as shown in FIG. 2, are often produced. An irregular coating such as shown in FIG. 1 is, in many situations, unacceptable because a non-planar surface degrades the resolution of subsequent photolithography. Voids such as shown in FIG. 2 are even less desirable because etching and dielectric properties will be nonuniform. In either case, lack of planarity generally produces difficulties in subsequent processing. Therefore, it is very desirable to produce a conformal coating. (Conformance is measured by two ratios, i.e., (1) the ratio between dimension s (FIG. 3) and dimension t and (2) the ratio between dimension b and dimension t.)
Although silicon oxide conformal coatings are very difficult to produce, one process, generally denominated the TEOS (tetraethoxysilane) process, leads to a silicon oxide region having ratios of approximately 0.9 for 1.0 .mu.m-dimension steps. This process involves flowing tetraethoxysilane over a heated deposition substrate and thus causing pyrolysis of the compound with the resulting formation of silicon oxide. The decomposition of the tetraethoxysilane must be performed at temperatures of approximately 700 degrees Centigrade or higher to achieve an acceptable silicon oxide deposition rate, i.e., g rate greater than 10 Angstroms/min. (Phosphorus oxide doping of silicon oxide formed from TEOS allows deposition at temperatures down to 650 degrees Centigrade.) However, device structures, e.g., LiNbO.sub.3 /silicon interfaces, doped silicon regions, and aluminum/silicon interfaces, which cannot tolerate nominal exposure to temperatures above 500 degrees Centigrade are common, and this sensitivity severely limits the usefulness of the TEOS process.
Lower temperature processes for depositing silicon oxides are available. Exemplary of such processes is the reaction of silane and oxygen at about 400 degrees Centigrade or silane and nitrous oxide at about 600 degrees Centigrade. The resulting silicon oxide of the silane/oxygen reaction contains particulate matter and is extremely nonconformal, exhibiting ratios less than 0.5. Similarly, the material resulting from silane/nitrous oxide reactions are also nonconformal. In either case, not only are nonconformal surfaces present, but nonuniform etching and electrical properties are often obtained.
A different approach to producing a low-temperature dielectric has involved the use of organic materials such as imide polymers. Nevertheless, an imide layer alone has been found to be unacceptable because of possible contamination of the underlying device regions. To alleviate this problem, a thin layer of quartz has generally been sputtered onto the substrate before formation of the imide region. Although contamination is precluded, this sputtering procedure is extremely slow, and as a result, is not particularly desirable. Thus, approaches involving the use of organic layers also have significant shortcomings.